Hashim's Space

Thursday, November 17, 2011

SESC: Simulator Configuration with CMP

Note: I am using LINUX with following specifications, g++ (Ubuntu/Linaro 4.6.1-9ubuntu3) 4.6.1.

Installing SESC first time, then follow this post SESC Simulator: First Time Installation for instructions.

Building SESC:

Make new directory ‘buildcmp’ in ‘sesc’ folder;

Simulator can be configured as many set of operations, so recommendation is to create different ‘build’ directory for each configuration.

> mkdir buildcmp

> cd buildcmp

Configuring SESC For SMP:

> ../sesc/configure --enable-smp

Executable SESC with SMP:

> make

’sesc.smp’ is the executable file for further testing.

Configuration File:
In case, you want to test simulator with CMP configurations without changing any parameter, there is one file ‘cmp.conf’ present in ‘/sesc/confs/’ folder.

Copy cmp.conf and shared.conf file in the build folder;

> cp ../sesc/confs/cmp.conf /home/user/build/

> cp ../sesc/confs/shared.conf /home/user/build/

Running FFT Benchmark:

There are few benchmark applications are available in ‘/sesc/tests/’ folder to test previously build simulator. While running this test simulation, crafty benchmark is used.

> ./sesc.smp -c cmp.conf ../sesc/benchmark/fft.mips

Output:

The generated simulator output file will be with the name ‘sesc_fft.xxxxxx’. The extension ‘xxxxxx’ is random and will be different every time benchmark is tested.

static[0x1006b810-0x10085ec4] heap[0x10086000-0x18086000] stack[0x18086000-0x1887e000] -> [0xae000000-0xb68127f0]

FFT with Blocking Transpose
1024 Complex Doubles
1 Processors
65536 Cache lines
16 Byte line size
4096 Bytes per page

PROCESS STATISTICS
Computation Transpose Transpose
Proc Time Time Fraction
0 66 13 0.19697

TIMING INFORMATION
Start time : 1735893725
Initialization finish time : 1735893730
Overall finish time : 1735893796
Total time with initialization : 71
Total time without initialization : 66
Overall transpose time : 13
Overall transpose fraction : 0.19697

SPLASH2 Benchmarks:

SPLASH2 Benchmark consists of different applications that can be run on SESC Simulator in order to evaluate cycles, power, and energy performance according to the parameters set in configuration file (sesc.conf).
Download Splash2 Benchmark Kernels Applications.

Other Links:

Monday, November 7, 2011

SESC: Simulator Configuration with Power Model SMP

Note: I am using LINUX with following specifications, g++ (Ubuntu/Linaro 4.6.1-9ubuntu3) 4.6.1.

Installing SESC first time, then follow this post SESC Simulator: First Time Installation for instructions.

Building SESC:

Make new directory ‘build’ in ‘sesc’ folder;

Simulator can be configured as many set of operations, so recommendation is to create different ‘build’ directory for each configuration.

> mkdir build

> cd build

Configuring SESC For SMP:

> ../sesc/configure --enable-smp --enable-power

Executable SESC with SMP:

> make

’sesc.smp’ is the executable file for further testing.

Configuration File:

In case, you want to test simulator with SMP configurations without changing any parameter, there is one file ‘smp.conf’ present in ‘/sesc/confs/’ folder.

Copy smp.conf and shared.conf file in the build folder;

> cp ../sesc/confs/smp.conf /home/user/build/

> cp ../sesc/confs/shared.conf /home/user/build/

Rename ‘smp.conf’ with ‘sesc.conf’.

Compilation SESC with Power Model:

‘cactify’ and ‘wattchify’, two executables are required for power and energy calculation.

'cactify'; for clock frequency, capacitance and power calculation
'wattchify'; for energy calculation

To generate executable, following commands are required;

> make cactify

> make wattchify

To obtain, power model based on the configuration file;

> ./wattchify sesc.conf tmp.conf

> ./cactify tmp.conf power.conf

‘power.conf’ is the simulator output file.

Running Benchmark:

There are few benchmark applications are available in ‘/sesc/tests/’ folder to test previously build simulator. While running this test simulation, crafty benchmark is used.

> ./sesc.smp -h0x800000 -cpower.conf ../sesc/tests/crafty < ../sesc/tests/tt.in

Output:

The generated simulator output file will be with the name ‘sesc_crafty.xxxxxx’. The extension ‘xxxxxx’ is random and will be different every time benchmark is tested.

static[0x1008db40-0x101b3dd4] heap[0x101b4000-0x109b4000] stack[0x109b4000-0x111ac000] -> [0xb6000000-0xb711e4c0]

Crafty v14.3

sesc_simulation_mark 0 (simulated) @32112426

White(1): sesc_simulation_mark 1 (simulated) @32183488

White(1): pondering disabled.

sesc_simulation_mark 2 (simulated) @32269704

White(1): noise level set to 0.

sesc_simulation_mark 3 (simulated) @32297868

White(1): search time set to 99999.00.

sesc_simulation_mark 4 (simulated) @32423267

White(1): verbosity set to 5.

sesc_simulation_mark 5 (simulated) @32447392

White(1): sesc_simulation_mark 6 (simulated) @32908293

White(1): search depth set to 2.

sesc_simulation_mark 7 (simulated) @32920437

White(1):

clearing hash tables

depth time score variation (1)

1 ###.## -0.67 axb5 c6xb5

1 ###.## -0.08 a4a5

sesc_simulation_mark 8 (simulated) @37373970

1-> ###.## -0.08 a4a5

2 ###.## -- a4a5

2 ###.## -0.65 a4a5 f6f5

2 ###.## -0.58 axb5 c6xb5 Ne4c5

2 ###.## -0.46 Rf1c1 f6f5

2 ###.## -0.43 Ra1c1 f6f5

sesc_simulation_mark 9 (simulated) @41424941

2-> ###.## -0.43 Ra1c1 f6f5

time:### cpu:### mat:-1 n:833 nps: ####

ext-> checks:18 recaps:4 pawns:0 1rep:6

predicted:0 nodes:833 evals:372

endgame tablebase-> probes done: 0 successful: 0

hashing-> trans/ref:17% pawn:83% used:w0% b0%

White(1): Ra1c1

time used: ###.##

sesc_simulation_mark 10 (simulated) @42650164

Black(1): execution complete.

Segmentation fault

Note: Till now, I am unable to figure it out that why there is segmentation fault after the end of execution (If anyone know, please let me know as well). Apart from segmentation fault occurrence, the simulator output file ‘sesc_crafty.xxxxxx’ is valid to generate report file.

Generating Report:
There is ‘report.pl’ script file located in ‘/sesc/scripts/’ folder, is to view the outcome of the benchmark.
Keep in mind that we are still in build directory, that we created in the start. So, by executing the following command;
> ../sesc/scripts/report.pl -last

Customization of Configuration File:
Th configuration file ('sesc.conf') contain design parameters; which can be changed to test simulation performance, for example;

Number of Processors [2-32]
Processor Issue Width [1-8]
L1 Instr. Cache Size [2048-16384]
L1 Data Cache Size [2048-16384]
L2 Private Cache Size [32768-262144]
L1 Instr. Cache Associativity [1-8]
L1 Data Cache Associativity [1-8]
L2 Data Cache Associativity [1-8]
I/D/L2 Cache Block Size [16-32]

After changing the configuration file, power model will be achieved by running the following commands at every change of configuration;
> ./wattchify sesc.conf tmp.conf
> ./cactify tmp.conf power.conf

SPLASH2 Benchmarks:
SPLASH2 Benchmark consists of different applications that can be run on SESC Simulator in order to evaluate cycles, power, and energy performance according to the parameters set in configuration file (sesc.conf).
Download Splash2 Benchmark Kernels Applications.

Other Links:

SESC Simulator: First Time Installation

Note: I am using LINUX with following specifications, g++ (Ubuntu/Linaro 4.6.1-9ubuntu3) 4.6.1.

SESC: Cycle Accurate Architectural Simulator is the official website for SESC Simulator which contains; documentation, SescUtils Package informaiton.

Downloading SESC:
To download pre-compiled binaries of SESC Simulator, use the following instructions in LINUX Shell.

> sudo cvs -d:pserver:anonymous@sesc.cvs.sourceforge.net:/cvsroot/sesc login (When password is requested, just press enter)
> cvs -z3 -d:pserver:anonymous@sesc.cvs.sourceforge.net:/cvsroot/sesc co -P sesc (By default, ‘sesc’ folder will be checked out in home folder)

Requirements:

Be sure that flex and bison is already installed
> sudo apt-get install zlib1g-dev

Building SESC:
Make new directory ‘build’ in ‘sesc’ folder;
Simulator can be configured as many set of operations, so recommendation is to create different ‘build’ directory for each configuration.
> mkdir build
> cd build

Configuring SESC:
SESC provides different configuration options, which can be checked using the following command;
> ../sesc/configure --help

Without any simulator configuration option, by default, all sesc directories are build.
> ../sesc/configure
> make

Errors during ‘make’:

‘USHRT_MAX’ was not declared in this scope in [/sesc/src/libcore/FetchEngine.cpp and /sesc/src/libcore/Cluster.cpp]

Sol: Add #include <limits.h>

linux/dirent.h: No such file or directory in [/sesc/src/libmint/subst.cpp]

Sol: Change #include <linux/dirent.h> to #include <dirent.h>

‘LONG_MAX’ was not declared in this scope, ‘uint32_t’ was not declared in this scope in [/sesc/src/libsuc/Config.cpp]

Sol: Add #include <limits.h>, Add #include <stdint.h>

‘/usr/bin/ld’: cannot find -lz”

Sol: sudo apt-get install zlib1g-dev

Executable SESC:
> make sesc
’sesc.mem’ is the executable file for further testing.

Test Simulation with Crafty Benchmark:
There are few benchmark applications are available in ‘/sesc/tests’ folder to test previously build simulator. While running test simulation, by default, crafty benchmark is used.
> make testsim

Output:

The generated simulator output file will be with the name ‘sesc_crafty.xxxxxx’. The extension ‘xxxxxx’ is random and will be different every time benchmark is tested.

cp /home/user/build/../sesc/confs/mem.conf sesc.conf

cp /home/user/build/../sesc/confs/shared.conf .

./sesc.mem -h0x800000 -csesc.conf /home/user/build/../sesc/tests/crafty < /home/user/build/../sesc/tests/tt.in

static[0x1008db40-0x101b3dd4] heap[0x101b4000-0x109b4000] stack[0x109b4000-0x111ac000] -> [0x41000000-0x4211e4c0]

Crafty v14.3

sesc_simulation_mark 0 (simulated) @30176688

White(1): sesc_simulation_mark 1 (simulated) @30226193

White(1): pondering disabled.

sesc_simulation_mark 2 (simulated) @30297416

White(1): noise level set to 0.

sesc_simulation_mark 3 (simulated) @30320969

White(1): search time set to 99999.00.

sesc_simulation_mark 4 (simulated) @30423178

White(1): verbosity set to 5.

sesc_simulation_mark 5 (simulated) @30448529

White(1): sesc_simulation_mark 6 (simulated) @30749553

White(1): search depth set to 2.

sesc_simulation_mark 7 (simulated) @30765858

White(1):

clearing hash tables

depth time score variation (1)

1 ###.## -0.67 axb5 c6xb5

1 ###.## -0.08 a4a5

sesc_simulation_mark 8 (simulated) @33088274

1-> ###.## -0.08 a4a5

2 ###.## -- a4a5

2 ###.## -0.65 a4a5 f6f5

2 ###.## -0.58 axb5 c6xb5 Ne4c5

2 ###.## -0.46 Rf1c1 f6f5

2 ###.## -0.43 Ra1c1 f6f5

sesc_simulation_mark 9 (simulated) @37835514

2-> ###.## -0.43 Ra1c1 f6f5

time:### cpu:### mat:-1 n:833 nps: ####

ext-> checks:18 recaps:4 pawns:0 1rep:6

predicted:0 nodes:833 evals:372

endgame tablebase-> probes done: 0 successful: 0

hashing-> trans/ref:17% pawn:83% used:w0% b0%

White(1): Ra1c1

time used: ###.##

sesc_simulation_mark 10 (simulated) @38876221

Black(1): execution complete.

Reports:
The generated output file in the previous step is based on type of configuration file. By changing parameters in the configuration file, the output file will be different.
There is ‘report.pl’ script file located in ‘/sesc/scripts/’ folder, is to view the outcome of the benchmark.
Keep in mind that we are still in build directory, that we created in the start. So, by executing the following command;
> ../sesc/scripts/report.pl -last

The detailed information based on the configuration file will be visible in the terminal. But by changing the script file, we can manage to write the output in text file as well.

Other Links:

Wednesday, November 2, 2011

SESC: Splash2 Benchmark Compilation Issue Resolved

I am using LINUX with following specifications, g++ (Ubuntu/Linaro 4.6.1-9ubuntu3) 4.6.1

After spending sometime, I am able to compile Splash2 Benchmark kernel applications with small modification in makefile of each application.

To download Splash2 benchmark, click -- > SESC: Splash2 Benchmark Kernels & Applications Package

Modification in Makefile of Each Kernel Application:
CFLAGS = -O2 -Olimit 2000 -w
LDFLAGS = -lmpc -lm

Replace the above two lines with
CFLAGS = -O2 -w
LDFLAGS = -lm

Then, run make to get the executable files e.g. CHOLESKY, FFT, LU, and RADIX.

To check associated parameters with each application, run the following command.
> ./CHOLESKY -h
> ./FFT -h
> ./LU -h
> ./RADIX -h

Rest of the work is all yours :)

Other Links:

Tuesday, November 1, 2011

SESC: SuperESCalar Simulator Initial Starting Guide

Many of us has problems in order to get started with SESC Simulaor, because there is not too much information available on the web and if there is some information then it is not at one place. So, we have to spend like hours to get tune with SESC to start our work.

The in depth document about SESC Simulator.

SESC: SuperESCalar Simulator

If viewers want to share information or facing problems, we can at least try to solve together :)

Other Links:

SESC: Splash2 Benchmark Kernels & Applications Package

SPLASH -- "Stanford Parallel Applications for Shared Memory"

Splash benchmark suite, developed by group of people working in Stanford University, contains kernels and applications for multiprocessor systems performance check.

Kernels:

Complex 1D FFT

Blocked LU Decomposition

Blocked Sparse Cholesky Factorization

Integer Radix Sort

Applications:

Barnes-Hut

Adaptive Fast Multipole

Ocean Simulation

Hierarchical Radiosity

Ray Tracer

Volume Renderer

Water Simulation with Spatial Data Structure

Water Simulation without Spatial Data Structure

Download Splash2 Package:

> cd ~/benchmarks

> mkdir splash2

> cd splash2

> wget http://www-flash.stanford.edu/apps/SPLASH/splash2.tar.gz

> tar -xzf splash2.tar.gz

For sure after downloading Splash2 benchmark files, you need to compile it too in order to use for your work and for further development purposes.

If you need Pre-compiled Binaries of Splash2 benchmark, you can write me Email or from my GoogleDrive. You can check this page to solve compilation problems, click --> SESC: Splash2 Benchmark Compilation Issue.

Reference:

Other Links:

Monday, September 12, 2011

Integration of BOSCH BMP085 using JENNIC 2-wire serial interface (I2Ccompatible) on JN-5148

The article describes use of Jennic hardware API library (AppHardwareApi_JN514x.h) for reading and writing data from the BOSCH BMP085 temperature and pressure sensor.

Hardware Description:

- The Jennic JN-5148 provides 2-wire synchronous serial interface, following I2C protocol, containing two lines of SCL (Serial Clock Line) connected to DIO14 and bi-directional SDA (Serial Data Line) connected to DIO15. The detailed description of Jennic Serial Interface and associated functions can be found at http://www.jennic.com/files/support_files/JN-UG-3066-Integrated-Peripherals-API.pdf.

- The BOSCH BMP085 consists of SCL (Serial Clock Line) connected to pin 6 and bi-directional SDA (Serial Data Line) connected to pin 7. The comprehensive description of BMP085 can be found at http://www.bosch-sensortec.com/content/language1/downloads/BST-BMP085-DS000-05.pdf.

Protocol Implementation Algorithm:

Major focus of this article is on how to communicate with BMP085 in order to read/write operations, and mathematical calculations for temperature and pressure can be found in the datasheet of BMP085.

Implementation is based on configuring Jennic as Master without interrupts enable and BMP085 as Slave device. The operational frequency 100 kHz is derived from Jennic system clock of 16 MHz by using pre-defined formula,

Operational Frequency = 16/[(Prescaler + 1) * 5]

Steps:

Jennic as Master Device and BMP085 as Slave Device configuration
Read calibration data from E2PROM of BMP085 for temperature and pressure
Reading and calculation of temperature
Reading and calculation of pressure
Resolution of output data is; Pressure – 0.01 hPa, and Temperature – 0.1 ˚C

Associated Jennic Functions:

void vAHI_SiMasterConfigure (bool_t bPulseSuppressionEnable, bool_t bInterruptEnable, uint8 u8PreScaler);
void vAHI_SiMasterWriteSlaveAddr (uint8 u8SlaveAddress, bool_t bReadStatus);
bool_t bAHI_SiMasterSetCmdReg (bool_t bSetSTA, bool_t bSetSTO, bool_t bSetRD, bool_t bSetWR, bool_t bSetAckCtrl, bool_t bSetIACK);
bool_t bAHI_SiMasterPollTransferInProgress (void);
void vAHI_SiMasterWriteData8 (uint8 u8Out);
uint8 u8AHI_SiMasterReadData8 (void);

Reading/Writing data from BMP085:

From the datasheet the BMP module address LSB distinguishes between read (1) and write (0) operations, corresponding to address 0xEF (read) and 0xEE (write). Where 0x77 is the BMP085 device address which will be Slave address.

// Sensor Address - Write Operation
uint8 BMP085_W = 0xEE;
// Sensor Address - Read Operation
uint8 BMP085_R = 0xEF;

PRIVATE void vI2CRead (uint8 u8ReadAddress, uint8* u8DataOut, uint8 u8Length)
{
uint8 i = 0;
  uint8 u8ReadLength;
  bool_t bFlag = FALSE;
  u8ReadLength = u8Length;
  vAHI_SiMasterWriteSlaveAddr (BMP085_W>>1, FALSE); // FALSE - Write Operation
  bFlag = bAHI_SiMasterSetCmdReg (E_AHI_SI_START_BIT,
                          E_AHI_SI_NO_STOP_BIT,
                          E_AHI_SI_NO_SLAVE_READ,
                          E_AHI_SI_SLAVE_WRITE,
                          E_AHI_SI_SEND_ACK,
                          E_AHI_SI_NO_IRQ_ACK);
  while(bAHI_SiMasterPollTransferInProgress()); // Wait While Busy
  vAHI_SiMasterWriteData8(u8ReadAddress);   // Address to Start Read From
  bFlag = bAHI_SiMasterSetCmdReg(E_AHI_SI_NO_START_BIT,
                          E_AHI_SI_NO_STOP_BIT,
                          E_AHI_SI_NO_SLAVE_READ,
                          E_AHI_SI_SLAVE_WRITE,
                          E_AHI_SI_SEND_ACK,
                          E_AHI_SI_NO_IRQ_ACK);
  while(bAHI_SiMasterPollTransferInProgress()); // Wait While Busy
  vAHI_SiMasterWriteSlaveAddr(BMP085_R>>1,TRUE); // TRUE - Read Operation
  vAHI_SiMasterSetCmdReg(E_AHI_SI_START_BIT,
                  E_AHI_SI_NO_STOP_BIT,
                  E_AHI_SI_NO_SLAVE_READ,
                  E_AHI_SI_SLAVE_WRITE,
                  E_AHI_SI_SEND_ACK,
                  E_AHI_SI_NO_IRQ_ACK);
  while(bAHI_SiMasterPollTransferInProgress()); // wait while busy
  // now we can start reading data back from the eeprom
  while(u8ReadLength > 0)
  {
      if(u8ReadLength < 2)    // is it the last byte
      {
          vAHI_SiMasterSetCmdReg(E_AHI_SI_NO_START_BIT,
                          E_AHI_SI_STOP_BIT,
                          E_AHI_SI_SLAVE_READ,
                          E_AHI_SI_NO_SLAVE_WRITE,
                          E_AHI_SI_SEND_NACK,
                          E_AHI_SI_NO_IRQ_ACK);
      }
      else
      {
          vAHI_SiMasterSetCmdReg(E_AHI_SI_NO_START_BIT,
                          E_AHI_SI_NO_STOP_BIT,
                          E_AHI_SI_SLAVE_READ,
                          E_AHI_SI_NO_SLAVE_WRITE,
                          E_AHI_SI_SEND_ACK,
                          E_AHI_SI_NO_IRQ_ACK);
      }
      while(bAHI_SiMasterPollTransferInProgress()); // wait while busy
      u8DataOut[i] = u8AHI_SiMasterReadData8();
      i=i+1;
      u8ReadLength--;
  }
}

PRIVATE void vI2CWrite (uint8* u8DataIn, uint8 u8Length)
{
  uint8 i = 0;
  uint8 u8WriteLength;
  u8WriteLength = u8Length;
  // set slave address
  vAHI_SiMasterWriteSlaveAddr(BMP085_W >> 1,FALSE);
  bAHI_SiMasterSetCmdReg(E_AHI_SI_START_BIT,
                  E_AHI_SI_NO_STOP_BIT,
                  E_AHI_SI_NO_SLAVE_READ,
                  E_AHI_SI_SLAVE_WRITE,
                  E_AHI_SI_SEND_ACK,
                  E_AHI_SI_NO_IRQ_ACK);
  while(bAHI_SiMasterPollTransferInProgress()); // wait while busy
  // now we can start writing data to the device
  while(u8WriteLength > 0)
  {
      // data to write
      vAHI_SiMasterWriteData8(u8DataIn[i++]);
      if(u8WriteLength < 2)    // is it the last byte
      {
          bAHI_SiMasterSetCmdReg(E_AHI_SI_NO_START_BIT,
                          E_AHI_SI_STOP_BIT,
                          E_AHI_SI_NO_SLAVE_READ,
                          E_AHI_SI_SLAVE_WRITE,
                          E_AHI_SI_SEND_NACK,
                          E_AHI_SI_NO_IRQ_ACK);
      }
      else
      {
          bAHI_SiMasterSetCmdReg(E_AHI_SI_NO_START_BIT,
                          E_AHI_SI_NO_STOP_BIT,
                          E_AHI_SI_NO_SLAVE_READ,
                          E_AHI_SI_SLAVE_WRITE,
                          E_AHI_SI_SEND_ACK,
                          E_AHI_SI_NO_IRQ_ACK);
      }
      u8WriteLength--;
      while(bAHI_SiMasterPollTransferInProgress()); // wait while busy
  }
}

I spent few days in understanding I2C protocol in general to start integration of pressure sensor with Jennic board, so I thought it would be beneficial to write in blog for others who found difficulty as well.

If anyone still interested in complete code, you can ask. I can send it you :)